[r-t] Hardware support for permutation operations

[Mark Davies]

Quentin Armitage writes,

> AMD seem to have dropped SSE5, and are replacing it with XOP, with PPERM
> being replaced by VPPERM

Ah, I had completely missed this was an AMD-only extension, and hasn't 
made it to production. Not a big deal by the look of things, going 
beyond 16 bytes isn't likely to be much help for most composing 
problems! PSHUFB and SSSE3 look quite sufficient for normal numbers of 
bells.

What we really need next is two or three SSE units in the same core, so 
we can get a bit of superscalar action going on...

MBD